Logic Design and Computer Organization UNIT-I | diplomachakhazana

 

Logic Design and Computer Organization UNIT-II

Logic Design and Computer Organization UNIT-III

Logic Design and Computer Organization UNIT-IV

UNIT-I

or–transistor logic (TTL) is a class of digital circuits built from ____________
a) JFET only
b) Bipolar junction transistors (BJT)
c) Resistors
d) Bipolar junction transistors (BJT) and resistors
Answer: d
Explanation: Transistor–transistor logic (TTL) is a class of digital circuits built from bipolar junction transistors (BJT) and resistors. However, resistors have a small role to play and both logic gating and amplifying functions are performed by the transistors.

2. TTL is called transistor–transistor logic because both the logic gating function and the amplifying function are performed by ____________
a) Resistors
b) Bipolar junction transistors
c) One transistor
d) Resistors and transistors respectively
Answer: b
Explanation: TTL is called transistor–transistor logic because both the logic gating function and the amplifying function are performed by bipolar junction transistors (BJTs).

3. TTL was invented in 1961 by ____________
a) Baker clamp
b) James L. Buie
c) Chris Brown
d) Frank Wanlass

Answer: b
Explanation: TTL was invented in 1961 by James L Buie.

4. The full form of TCTL is ____________
a) Transistor-coupled transistor logic
b) Transistor-capacitor transistor logic
c) Transistor-complemented transistor logic
d) Transistor-complementary transistor logic
Answer: a
Explanation: The full form of TCTL is transistor-coupled transistor logic.

5. The _______ ancestor to the first personal computers.
a) PARAM 1
b) SATYAM 1
c) KENBAK 1
d) MITS Altair
Answer: c
Explanation: The KENBAK 1, ancestor to the first personal computers.

6. TTL inputs are the emitters of a ____________
a) Transistor-transistor logic
b) Multiple-emitter transistor
c) Resistor-transistor logic
d) Diode-transistor logic
Answer: b
Explanation: TTL inputs are the emitters of a multiple-emitter transistor.

7. TTL is a ____________
a) Current sinking
b) Current sourcing
c) Voltage sinking
d) Voltage sourcing
Answer: a
Explanation: Like DTL, TTL is a current-sinking logic since a current must be drawn from inputs to bring them to a logic 0 level. Current Sink means it accepts current coming out from a source.

8. Standard TTL circuits operate with a __ volt power supply.
a) 2
b) 4
c) 5
d) 3
Answer: c
Explanation: Standard TTL circuits operate with a 5-volt power supply.

9. TTL devices consume substantially ______ power than equivalent CMOS devices at rest.
a) Less
b) More
c) Equal
d) Very High
Answer: b
Explanation: TTL devices consume substantially more power than equivalent CMOS devices at rest. Thus, CMOS devices are faster than TTL devices.

10. A TTL gate may operate inadvertently as an ____________
a) Digital amplifier
b) Analog amplifier
c) Inverter
d) Regulator

Answer: b
Explanation: A TTL gate may operate inadvertently as an analog amplifier if the input is connected to a slowly changing input signal that traverses the unspecified region from 0.7V to 3.3V.

11. The speed of ______ circuits is limited by the tendency of common emitter circuits to go into saturation.
a) TTL
b) ECL
c) RTL
d) DTL
Answer: a
Explanation: The speed of TTL circuits is limited by the tendency of common emitter circuits to go into saturation due to the injection of minority carriers into the collector region. Hence, it functions slowly compared to CMOS devices. 

12. Which of the following is the most widely employed logic family?

a) Emitter-coupled logic
b) Transistor-transistor logic
c) CMOS logic family
d) NMOS logic

Answer: b

Explanation: Transistor-transistor logic is the most widely employed logic family. It is the most popular logic family.

13. The basic function of TTL gate is which of the following functions?

a) AND
b) OR
c) NOR
d) NAND

Answer: d

Explanation: The basic function of TTL gate is NAND function. It is the most popular logic family.

14. In TTL logic, the input transistor has a number of ________ equal to the desired fan-in of the circuit.

a) Base
b) Collect
c) Emitter
d) Gate

Answer: c

Explanation: In TTL logic, the input transistor has a number of emitter equal to the desired fan-in of the circuit. This is a major advantage.

15. Which of the following is the propagation delay of TTL circuits?

a) 1 s
b) 1 ms
c) 1 ns
d) 1 ps

Answer: c

Explanation: The propagation delay of TTL circuit is 1 ns. It is a main characteristic of TTL circuit.

16. The standard TTL gates are marketed as _______ series.

a) 80
b) 82
c) 74
d) 08

Answer: c

Explanation: The standard TTL gates are marketed as 74 series. They can operate up to 700C.

17. Schottky TTL logic family does not have which of the following features?

a) Good fan-in
b) Good fan-out
c) High speed capability
d) High propagation delay

Answer: d

Explanation: Schottky TTL circuits have reduced propagation delay than normal TTL circuits. The propagation delay of 10ns is very high for some applications.

18. The logic ‘0’ of ECL is represented as ______V and logic ‘1’ is represented as ______V.

a) 1, 1.65
b) 0.9, 1.75
c) 1.2, 2.35
d) 1.9, 4.3

Answer: b

Explanation: The logic ‘0’ of ECL is represented as 0.9 V and logic ‘1’ is represented as 1.75 V. ECL stands for emitter-coupled logic.

19. ECL is a way of achieving higher speed of gate.

a) True
b) False

Answer: a

Explanation: We can achieve high speed of gate by sing ECL. ECL stands for emitter-coupled logic.

20. Which of the following is not the advantage of MOS gates?

a) Low power dissipation
b) Small size
c) Good immunity to noise
d) High switching speeds

Answer: d

Explanation: MOS gates do not have high switching speed. They have limited switching capability.

21. CMOS gates are commercially available as which of the following series?

a) 1000
b) 2000
c) 3000
d) 4000

Answer: d

Explanation: CMOS gates are commercially available as 4000 series. This technique is most suitable for commercial circuits.

22. The switching of MOS gates can be improved by using CMOS.
a) True
b) False
Answer: a
Explanation: The switching of MOS gates can be improved by using CMOS. CMOS stands for complementary MOS. It is an inverter.

23. When both nMOS and pMOS transistors of CMOS logic gates are ON, the output is:
a) 1 or Vdd or HIGH state
b) 0 or ground or LOW state
c) Crowbarred or Contention(X)
d) None of the mentioned
Answer: c
Explanation: The crowbarred (or contention) X level exists when both pull up and pull down transistors are simultaneously turned ON. Contention between the two networks results in an indeterminate output level and dissipates static power.

24. When both nMOS and pMOS transistors of CMOS logic design are in OFF condition, the output is:
a) 1 or Vdd or HIGH state
b) 0 or ground or LOW state
c) High impedance or floating(Z)
d) None of the mentioned
Answer: c
Explanation: When both pull up and pull down transistors are OFF, the high impedance for floating Z output state results.

25. In CMOS logic circuit the n-MOS transistor acts as:
a) Load
b) Pull up network
c) Pull down network
d) Not used in CMOS circuits
Answer: c
Explanation: A static CMOS gate has an nMOS pull-down network to connect the output to 0 (GND).

26. In CMOS logic circuit the p-MOS transistor acts as:
a) Pull down network
b) Pull up network
c) Load
d) Short to ground
Answer: b
Explanation: A static CMOS gate has a pMOS pull-up network to connect the output to VDD (1).

27. In CMOS logic circuit, the switching operation occurs because:
a) Both n-MOSFET and p-MOSFET turns OFF simultaneously for input ‘0’ and turns ON simultaneously for input ‘1’
b) Both n-MOSFET and p-MOSFET turns ON simultaneously for input ‘0’ and turns OFF simultaneously for input ‘1’
c) N-MOSFET transistor turns ON, and p-MOSFET transistor turns OFF for input ‘1’ and N-MOS transistor turns OFF, and p-MOS transistor turns ON for input ‘0’
d) None of the mentioned
Answer: c
Explanation: In CMOS logic circuit, the switching operation occurs because N-MOS transistor turns ON, and p-MOS transistor turns OFF for input ‘1’ and N-MOS transistor turns OFF, and p-MOS transistor turns ON for input ‘0’. The networks are arranged such that one is ON and the other OFF for any input pattern.

28. Mobility depends on ________
a) Transverse electric field
b) Vg
c) Vdd
d) Channel length
Answer: a
Explanation: Mobility is affected by the transverse electric field and thus also depends on Vgs and the mobility of p-device and n-device are inherently unequal.

29. In CMOS inverter, transistor is a switch having ________
a) infinite on resistance
b) finite off resistance
c) buffer
d) infinite off resistance
Answer: b
Explanation: In CMOS inverter, transistor is a switch having finite on resistance and infinite off resistance.

30. CMOS inverter has ______ output impedance.
a) low
b) high
c) very high
d) none of the mentioned
Answer: a
Explanation: CMOS inverter has low output impedance and this makes it less prone to noise and disturbance.

31. What is the input resistance of CMOS inverter?
a) high
b) low
c) very low
d) none of the mentioned
Answer: a
Explanation: Input resistance of CMOS inverter is extremely high as it is a perfect insulator and draws no dc input source.

32. Increasing fan-out ____________ the propagation delay.
a) increases
b) decreases
c) does not affect
d) exponentially decreases
Answer: a
Explanation: In CMOS inverter, increasing the fan-out also increases the propagation delay. Fan-out is a term that defines the maximum number of digital inputs that the output of a single logic gate can feed.

33. Fast gate can be built by keeping ________
a) low output capacitance
b) high on resistance
c) high output capacitance
d) input capacitance does not affect speed of the gate
Answer: a

Explanation: Fast gate can be built by keeping the output capacitance small and by decreasing the on resistance of the transistor.

34. CMOS inverter has ______ regions of operation.
a) three
b) four
c) two
d) five
Answer: d
Explanation: CMOS inverter has five distinct regions of operation which can be determined by plotting CMOS inverter current versus Vin.

35. CMOS technology is used in ____________
a) Inverter
b) Microprocessor
c) Digital logic
d) Both microprocessor and digital logic
Answer: d
Explanation: CMOS technology is used in Microprocessor, Microcontroller, static RAM and other digital logic circuits. CMOS technology is also used for several analog circuits such as image sensors (CMOS sensor), data converters and highly integrated transceivers for many types of communication.

36. Two important characteristics of CMOS devices are ____________
a) High noise immunity
b) Low static power consumption
c) High resistivity
d) Both high noise immunity and low static power consumption
Answer: d
Explanation: Two important characteristics of CMOS devices are high noise immunity and low static power consumption. Since one transistor of the pair is always off and the series combination draws significant power only momentarily during switching between on and off states. Also, the performance of CMOS is not altered with the presence of noise and thus it has high noise immunity.

37.CMOS behaves as a/an ____________
a) Adder
b) Subtractor
c) Inverter
d) Comparator

Answer: c
Explanation: Since, the outputs of the PMOS and NMOS transistors are complementary such that when the input is low, the output is high and when the input is high, the output is low. Because of this behaviour of input and output, the CMOS circuit’s output is the inverse of the input. Whereas, adders and subtractors are combinational circuits. 

38.An important characteristic of a CMOS circuit is the ____________
a) Noise immunity
b) Duality
c) Symmetricity
d) Noise Margin

Answer: b
Explanation: An important characteristic of a CMOS circuit is the duality that exists between its PMOS transistors and NMOS transistors. Due to the presence of two different types of transistors, the device has a complementary function.

39.CMOS logic dissipates _______ power than NMOS logic circuits.
a) More
b) Less
c) Equal
d) Very High
Answer: b
Explanation: CMOS logic dissipates less power than NMOS logic circuits because CMOS dissipates power only when switching (“dynamic power”). Thus, CMOS has less power consumption and is more efficient. 

40.The full form of CMOS is ____________
a) Capacitive metal oxide semiconductor
b) Capacitive metallic oxide semiconductor
c) Complementary metal oxide semiconductor
d) Complemented metal oxide semiconductor
Answer: c
Explanation: The full form of CMOS is complementary metal oxide semiconductor. In this type of device, both n-type and p-type transistors are used in a complementary way.

41.Sign magnitude is a very simple representation of ?

A. Positive number
B. Negative numbers
C. Infinity
D. Zero

Ans : B

Explanation: Sign magnitude is a very simple representation of negative numbers

42.Sign bit 1 represents

A. Positive number
B. FALSE
C. TRUE
D. Negative Number

Ans : D

Explanation: Sign bit 1 represents negative sign. Sign bit 0 represents positive sign.

43.Which of the following is true about Normalization?

A. Floating point numbers are usually normalized
B. Exponent is adjusted so that leading bit (MSB) of mantissa is 1
C. Since it is always 1 there is no need to store it
D. All of the above

Ans : D

Explanation: All of the above is true.

44.The logic 1 in positive logic system is represented by ? 

A. Zero voltage
B. Lower voltage level
C. Higher voltage level
D. Negative voltage

Ans : C

Explanation: The logic 1 is represented by higher voltage while 0 is represented as low voltage.

45.What is the hexadecimal equivalent of a binary number 10101111 ?

A. AB
B. AC
C. AF
D. AD

Ans : C

Explanation: Hexadecimal equivalent of a binary number 10101111 is AF

 46.Most computers use the _______________ representation when performing arithmetic operations with integers. 

(A) signed-magnitude 

(B) signed-1's complement 

(C) signed-2's complement
(D) any of the above 

Ans : C

47. Convert the decimal number 45 to one’s complement form.

(a) 101101

(b) 010010

(c) 100010

(d) 010110

(e) 010001

Solution: 

b

Step 1:

Convert the given number to binary number.

4510 = 1011012

Step 2: Invest the value of numbers “1 by zero” and “byone”

1011012→ 0100102

48. What is the one’s complement of a number 0111001102?

(a) 100011101

(b) 000011001

(c) 110011001

(d) 100011001

(e) None of these

Solution: d

011100110 → 100011001

49. What is the one’s complement of a number 10001102

(a) 10110012

(b) 0111101

(c) 0111001

(d) 01100001

(e) 1001001

Solution: c

1000110 → 0111001

50. What is the one’s complement of a number 2810

(a) 100112

(b) 000012

(c) 110112

(d) 111002

(e) None of these

Solution: e

Step 1: 2810 →11100

Step 2: 11100 → 00011

51. What is the one’s complement of a number 5610

(a) 111

(b) 110

(c) 1101

(d) 1111

(e) 000011

Solution: a

Step 1: Binary conversion

5610→ 111000

Step 2: Invert the digits

111000→ 000111

52.100111012

(a) 01100011

(b) 1101100

(c) 1100010

(d) 1101110

(e) 1100001

Solution: a

Step 1: Inert the digits

1001  11012→01100010

Step 2: Add 1 with LSB

 

53. 2510

(a) 110

(b) 111

(c) 1101

(d) 100

(e) 101

Solution: b

Step 1: Binary conversion: 2510→11001

Step 2: Invert the digits : 11001 →00110

54. 9210

(a) 001100

(b) 101100

(c) 110100

(d) 100100

(e)101011

Solution: 

Step 1: Binary conversion: 9210→1011100

Step 2: Invert the digits : 1011100 →01000112

Step 3: Add 1 with LSB

55. 110111010112

(a) 111000101

(b) 111010101

(c) 100110101

(d) 110010101

(e) 100010101

Solution: e

Step 1: Inert the digits

11011101011

Step 2: Add 1 with LSB

56. A code converter is a logic circuit that _____________
a) Inverts the given input
b) Converts into decimal number
c) Converts data of one type into another type
d) Converts to octal
Answer: c
Explanation: A code converter is a logic circuit that changes data presented in one type of binary code to another type of binary code.

57.Use the weighting factors to convert the following BCD numbers to binary ___________

0101 0011 & 0010 0110 1000

a) 01010011 001001101000
b) 11010100 100001100000
c) 110101 100001100
d) 101011 001100001
Answer: c
Explanation: Firstly, convert every 4 sets of binary to decimal from the given: 0101=5, 0011=3. Then convert 53 to binary, which will give 110101. Again, do the same with the next 4 set of binary digits.

58. The primary use for Gray code is ___________
a) Coded representation of a shaft’s mechanical position
b) Turning on/off software switches
c) To represent the correct ASCII code to indicate the angular position of a shaft on rotating machinery
d) To convert the angular position of a shaft on rotating machinery into hexadecimal code
Answer: a
Explanation: Gray code is useful because only one bit changes at a time, which is implemented easily in Coded representation of a shaft’s mechanical position. In Gray Code, every sequence of successive bits differs by 1 bit only. 

59. Code is a symbolic representation of ___________
a) Discrete information
b) Continuous information
c) Decimal information into binary
d) Binary information into decimal
Answer: a
Explanation: Code is a symbolic representation of discrete information. Codes can be anything like numbers, letter or words, written in terms of group of symbols.

60. One way to convert BCD to binary using the hardware approach is ___________
a) With MSI IC circuits
b) With a keyboard encoder
c) With an ALU
d) UART
Answer: a
Explanation: One way to convert BCD to binary using the hardware approach is MSI IC (i.e. medium scale integration) circuits.

61. Why is the Gray code more practical to use when coding the position of a rotating shaft?
a) All digits change between counts
b) Two digits change between counts
c) Only one digit changes between counts
d) Alternate digit changes between counts
Answer: c
Explanation: The Gray code is more practical to use when coding the position of a rotating shaft because only one digit changes between counts that is reflected to the next count.

62. Reflected binary code is also known as ___________
a) BCD code
b) Binary code
c) ASCII code
d) Gray Code

Answer: d
Explanation: The reflected binary code is also known as gray code because one digit reflected to the next bit. In Gray Code, every sequence of successive bits differs by 1 bit only. 

63. Why do we use gray codes?
a) To count the no of bits changes
b) To rotate a shaft
c) Error correction
d) Error Detection

Answer: c
Explanation: Today, Gray codes are widely used to facilitate error correction in digital communications such as digital terrestrial television and some cable TV systems.

64. Earlier, reflected binary codes were applied to ___________
a) Binary addition
b) 2’s complement
c) Mathematical puzzles
d) Binary multiplication
Answer: c
Explanation: The reflected binary code is also known as gray code because one digit reflected to the next bit. In Gray Code, every sequence of successive bits differs by 1 bit only. Reflected binary codes were applied to mathematical puzzles before they became known to engineers.

65. The binary representation of BCD number 00101001 (decimal 29) is ___________
a) 0011101
b) 0110101
c) 1101001
d) 0101011
Answer: a
Explanation: The given BCD number 00101001 has three 1s. So, it can be rewritten as 0000001-1, 0001000-8, 0010100-20 and after addition, we get 0011101 as output. 

66. Convert binary number into gray code: 100101.
a) 101101
b) 001110
c) 110111
d) 111001
Answer: c
Explanation: : Conversion from Binary To Gray Code:

                        

1 (XOR) 0 (XOR)  0 (XOR)  1 (XOR)  0 (XOR)  1 

                        

        ↓        ↓        ↓        ↓        ↓      

1              1                0                1                1                1

67.The terms in SOP are called ___________
a) max terms
b) min terms
c) mid terms
d) sum terms
Answer: b
Explanation: The SOP is the sum of products. It consists of min terms often called the product terms.

Similarly, POS consists of max terms. 

68. A sum of products expression is a product term (min term) or several min terms ANDed together.
a) True
b) False
Answer: b
Explanation: The statement is partially correct.
A sum of products expression is a product term (min term) or several min terms OR ed(i.e. added) together. 

69. Which of the following is an incorrect SOP expression?
a) x+x.y
b) (x+y)(x+z)
c) x
d) x+y
Answer: b
Explanation: The second expression is incorrect because it consists of two maxterms ANDed together.
This makes it a POS or the product of sum expression.
Other options are valid SOP expressions. 

70. The corresponding min term when x=0, y=0 and z=1.
a) x.y.z’
b) X’+Y’+Z
c) X+Y+Z’
d) x’.y’.z
Answer: d
Explanation: The min term is obtained by taking the complement of the zero values and taking the term with value 1 as it is.
Here, x=0,y=0 and z=1, then the min term is x’y’z. 

71. LSI stands for ___________
a) Large Scale Integration
b) Large System Integration
c) Large Symbolic Instruction
d) Large Symbolic Integration
Answer: a
Explanation: It stands for large scale integration. This is the abstraction level of the integrated circuits.
It can also be small scale, medium, large or very large scale integration. 

72. Which operation is shown in the following expression: (X+Y’).(X+Z).(Z’+Y’)
a) NOR
b) ExOR
c) SOP
d) POS
Answer: c
Explanation: The expression comprises of max terms.
Also, the terms are ANDed together, therefore it is a POS term. 

73. The number of min terms for an expression comprising of 3 variables?
a) 8
b) 3
c) 0
d) 1
Answer: a
Explanation: If any expression comprises of n variables, its corresponding min terms are given by 2n.
Here, n=3 since there are 3 variables therefore, min terms=23=8. 

74. The number of cells in a K-map with n-variables.
a) 2n
b) n2
c) 2n
d) n
Answer: c
Explanation: K-map is nothing but Karnaugh map.
SOP and POS expressions can be simplified using the K-map.
The number of cells in case of n-variables=2n. 

75. The output of AND gates in the SOP expression is connected using the ________ gate.
a) XOR
b) NOR
c) AND
d) OR
Answer: d
Explanation: Since the product terms or the min terms are added in an SOP expression.
Therefore, the OR gate is used to connect the AND gates. 

76. The expression A+BC is the reduced form of ______________
a) AB+BC
b) (A+B)(A+C)
c) (A+C)B
d) (A+B)C
Answer: b
Explanation: The second option is correct.
It can simplified as follows: (A+B)(A+C)
=AA+AC+AB+BC
=A+AC+AB+BC
=A(1+C)+AB+BC
=A+AB+BC
=A(1+B)+BC
=A+BC. 

77. The logical sum of two or more logical product terms is called __________
a) SOP
b) POS
c) OR operation
d) NAND operation
Answer: a
Explanation: The logical sum of two or more logical product terms, is called SOP (i.e. sum of product). The logical product of two or more logical sum terms is called POS (i.e. product of sums).

78. The expression Y=AB+BC+AC shows the _________ operation.
a) EX-OR
b) SOP
c) POS
d) NOR
Answer: b
Explanation: The given expression has the operation product as well as the sum of that. So, it shows SOP operation. POS will be the product of sum terms.

79. The expression Y=(A+B)(B+C)(C+A) shows the _________ operation.
a) AND
b) POS
c) SOP
d) NAND
Answer: b
Explanation: The given expression has the operation sum as well as the product of that. So, it shows POS(product of sum) operation. SOP will be the sum of product terms.

80. A product term containing all K variables of the function in either complemented or uncomplemented form is called a __________
a) Minterm
b) Maxterm
c) Midterm
d) ∑ term
Answer: a
Explanation: A product term containing all K variables of the function in either complemented or uncomplemented form is called a minterm. A sum term containing all K variables of the function in either complemented or uncomplemented form is called a maxterm.

81. According to the property of minterm, how many combination will have value equal to 1 for K input variables?
a) 0
b) 1
c) 2
d) 3
Answer: b
Explanation: The main property of a minterm is that it possesses the value 1 for only one combination of K input variables and the remaining will have the value 0.

82. The canonical sum of product form of the function y(A,B) = A + B is __________
a) AB + BB + A’A
b) AB + AB’ + A’B
c) BA + BA’ + A’B’
d) AB’ + A’B + A’B’
Answer: b
Explanation: A + B = A.1 + B.1 = A(B + B’) + B(A + A’) = AB + AB’ + BA +BA’ = AB + AB’ + A’B = AB + AB’ + A’B.

83. A variable on its own or in its complemented form is known as a __________
a) Product Term
b) Literal
c) Sum Term
d) Word
Answer: b
Explanation: A literal is a single logic variable or its complement. For example — X, Y, A’, Z, X’ etc.

84. Maxterm is the sum of __________ of the corresponding Minterm with its literal complemented.
a) Terms
b) Words
c) Numbers
d) Nibble
Answer: a
Explanation: Maxterm is the sum of terms of the corresponding Minterm with its literal complemented. 

85. Canonical form is a unique way of representing ____________
a) SOP
b) Minterm
c) Boolean Expressions
d) POS
Answer: c
Explanation: Boolean Expressions are represented through a canonical form. An example of canonical form is A’B’C’ + AB’C + ABC’.

86. There are _____________ Minterms for 3 variables (a, b, c).
a) 0
b) 2
c) 8
d) 1
Answer: c
Explanation: Minterm is given by 2n. So, 23 = 8 minterms are required.

87. _____________ expressions can be implemented using either (1) 2-level AND-OR logic circuits or (2) 2-level NAND logic circuits.
a) POS
b) Literals
c) SOP
d) POS
Answer: c
Explanation: SOP expressions can be implemented using either (1) 2-level AND-OR logic circuits or (2) 2-level NAND logic circuits.